[ Professor* ] Tetsuo Endoh
[ Assistant Professor* ] Yitao Ma
The purpose of the Spintronics/CMOS Hybrid Brain-Inspired Integrated System group is to break ground for a new AI approach across from the fundamental science of material and information to the devices, circuits, architecture and software technology for information generating, storing and recognition, based on both the concept of RIEC on realization of humanity-rich communication and its past achievements on hardware technology for information and communication. This group aims to study the basic technology for high efficient semiconductor integrated circuit combing the information storage and processing of the AI system together, and to lead and contribute the innovative development of high efficient and low power hardware technology for advanced flexible information processing and recognition like human brain. This group is trying to develop the novel brain-inspired computing system realizing the precise and real-time processing for information value judgment, choice and refusal by consistently evolving the proposal, design, verification and evaluation of the next-generation AI VLSI architecture, which is able to maximize the power consumption efficiency benefiting from the high speed and high endurance of the spin-device.
Spintronics/CMOS Hybrid Brain-Inspired Integrated System (Prof. Endoh)
The Spintronics/CMOS Hybrid Brain-Inspired Integrated System group aims to concentrate the scientific principle for AI computing, brain-inspired VLSI and spintronics/CMOS hybrid device/circuit/architecture technology, to construct the new system of spintronics/CMOS hybrid VLSIs, and to realize the high functional and ultra-low-power spintronics/CMOS hybrid brain- mimicking VLSI system. For such occasions, the entire research group is well-organized in two separated topic of “von Neumann type” and “non von Neumann type” with organical knowledge sharing, technology transfer and feedback. In order to realize the “Society5.0” next-generation information society, not only the supergiant data generation over Yotta (1024) byte but also the AI information processing that appends the quality of information and supports the human thought become increasingly important. On the other hand, conventional AI implementation approaches based on volatile memories are very disadvantageous in power consumption efficiency and not feasible for practical use. In this group, a “von Neumann type” STT-MRAM-based multi-core nonvolatile associative processor system for IoT applications is realized employing infinitely rewritable and 3-Dimension stackable spintronics device, which achieves about 40-time higher power efficiency and 3-time higher circuit area efficiency. Furthermore, the “non von Neumann type” digital-analog hybrid brain-inspired VLSI is proposed and put to verification adopting digital-pulse-based spiking-neural-networks, which makes it possible for the time-series processing and ultra-low-power usages based on fast and autonomically sleep-down/wake-up power control corresponding to the low/high status of digital pulse.